An integrated circuit includes components such as metal oxide semiconductor (MOS) transistors with wells and doped regions that act as coupled bipolar transistors, and so be susceptible to latchup. During a latchup condition, the coupled bipolar transistors conduct large currents, interfering with operation of the integrated circuit. Latchup is triggered by current flow below the components which cause lateral voltage gradients which turn on the coupled bipolar transistors. One approach to reducing susceptibility to latchup is to provide a heavily doped substrate with a lightly doped epitaxial layer and forming the components in the epitaxial layer. The thickness of the epitaxial layer is selected so that the heavily doped substrate is close enough to the components to shunt the current flow below the components, reducing the lateral voltage gradients, while being separated enough to reduce effects on performance of the components.
The integrated circuit includes other components such as low voltage MOS transistors which do not extend close to the substrate. Thus, the substrate is too far removed from these components to reduce latchup susceptibility to a desired level. Decreasing the thickness of the epitaxial layer to reduce latchup susceptibility in the shallow components causes performance degradation in deeper components.